Semiconductor wafers for integrated circuits are conventionally prepared by slicing the wafers from a single crystal of semiconductor material. The raw sliced wafers are then processed to provide a polished, damage free surface in which integrated circuit devices are formed. The integrated circuit devices are formed very close to the surface so that a surface layer of only about 5-10 microns in depth of the normally about 15 mil thick wafer is actually used to form the devices. The bulk of the thickness is used to provide sufficient strength so that the wafer won't warp or break during manufacture of the devices.
The net result is that the bulk of the high purity semiconductor material, which has been carefully grown into a single crystal, is used for a purpose which could be served by other less costly materials. With the trend to use larger diameter wafers, which must be thicker to avoid warping or breakage, even more material is wasted.
U.S. Pat. No. 3,864,819 describes a process for forming semiconductor devices where a wafer is thinned before or after bonding to a metal support plate. Processes for bonding sheets of semiconductor materials together, which are then sliced vertically to form transistors, are described, for example, in U.S. Pat. Nos. 3,422,527; 3,488,835 and 3,579,816.
The invention provides a process to form composite wafers, comprised of a thin layer of a high quality semiconductor crystal joined to a support layer, which can be processed in conventional integrated circuit manufacturing equipment. The process uses only about one half the high grade semiconductor material normally used in forming conventional wafers.